IEC 60191-1:2018 PDF

Scope: This part of IEC 60191 gives guidelines on the preparation of outline drawings of discrete devices, including discrete surface-mounted semiconductor devices with lead count less than 8. For the preparation of outline drawings of surface-mounted discrete devices with a lead count higher or equal to 8, IEC 60191-6 should be referred to as well. The primary object of these drawings is to indicate the space to be allowed for devices in equipment, together with other dimensional characteristics required to ensure mechanical interchangeability. Complete interchangeability involves other considerations such as the electrical and thermal characteristics of the semiconductor devices concerned. The international standardization represented by these drawings therefore encourages the manufacturers of devices to comply with the tolerances shown on the drawings in order to extend their range of customers internationally. It also gives equipment designers an assurance of mechanical interchangeability between the devices obtained from suppliers in different countries, provided they allow the space in their equipment that is indicated by the drawings and take note of the more precise information on bases, studs, etc. NOTE Additional details of reference letter symbols used in this document are given in Annex A.

IEC 60191-1:2018 Referenced Document

IEC 60191-2:1966 Mechanical standardization of semiconductor devices. Part 2 : Dimensions
IEC 60191-4:2013 Mechanical Standardization of Semiconductor Devices - Part 4: Coding system and classification into forms of package outlines for semiconductor device packages
IEC 60191-6-1:2001 Mechanical standardization of semiconductor devices - Part 6-1: General rules for the preparation of outline drawings of surface mounted semiconductor device packages; Design guide for gull-wing lead terminals
IEC 60191-6-20:2010 Mechanical standardization of semiconductor devices - Part 6-20: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline J-lead packages (SOJ)
IEC 60191-6-21:2010 Mechanical standardization of semiconductor devices - Part 6-21: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline packages (SOP)
IEC 60191-6-3:2000 Mechanical standardization of semiconductor devices - Part 6-3: General rules for the preparation of outline drawings of surface mounted semiconductor device packages; Measuring methods for package dimensions of quad flat packs (QFP)

2018 IEC 60191-1:2018 Mechanical standardization of semiconductor devices - Part 1: General rules for the preparation of outline drawings of discrete devices
2007 IEC 60191-1:2007 Mechanical standardization of semiconductor devices - Part 1: General rules for the preparation of outline drawings of discrete devices
1966 IEC 60191-1:1966 Mechanical standardization of semiconductor devices. Part 1 : Preparation of drawings of semiconductor devices