This specification specifies the deliverables and their related design guidelines and data formats to facilitate the testing, exchange and integration of mixed-signal IP cores (Intellectual Property Core, hereinafter referred to as IP) of a defined process. These components are mainly targeted at digital system chip applications. This specification also provides a detailed model list of deliverables to facilitate the exchange, integration, and verification of process-defined mixed-signal IP. The "area of use" of the data format is specified as the description of the creation, definition, exchange and integration of IP in integrated circuits.
SJ/Z 11354-2006 Referenced Document
SJ/Z 11357-2006 Integrated circuit soft and hard IP core strucutural, performance and physica Imodeling specification