GB/T 41325-2022 (English Version) PDF

Scope: This document specifies the technical requirements, test methods, inspection rules, packaging, marking, transportation, storage, accompanying documents and order form for low-density crystal primary pit silicon single crystal polished wafers (hereinafter referred to as Low-COP polished wafers). This document is applicable to Low-COP polished wafers with a diameter of 200 mm and 300 mm, a crystal orientation <100>, and a resistivity of 0.1 Ω·cm~100 Ω·cm for integrated circuits that are sensitive to crystal pits.

GB/T 41325-2022 Referenced Document

GB/T 12962 Silicon single crystal
GB/T 12965 Monocrystalline silicon as cut wafers and lapped wafers
GB/T 14264 Semiconductor materials-Terms and definitions
GB/T 1550 Test methods for conductivity type of extrinsic semiconducting materials
GB/T 19921 Test method for particles on polished silicon wafer surfaces
GB/T 2828.1 Inspection procedure by count sampling part 1: Lot by lot inspection sampling plan retrieved by acceptance quality limit (AQL)
GB/T 29505 Test method for measuring surface roughness on planar surfaces of silicon wafer
GB/T 29507 Test method for measuring flatness,thickness and total thickness variation on silicon wafers.Automated non-contact scanning
GB/T 32280 Test method for warp and bow of silicon wafers—Automated non-contact scanning method
GB/T 39145 Test method for the content of surface metal elements on silicon wafers—Inductively coupled plasma mass spectrometry
GB/T 4058 Test method for detection of oxidation induced defects in polished silicon wafers
GB/T 6616 Non-contact eddy current method for testing semiconductor wafer resistivity and semiconductor film sheet resistance*， 2023-08-06 Update
GB/T 6624 Standard method for measuring the surface quality of polished silicon slices by visual inspection
YS/T 28 Wafer packaging
YS/T 679 Surface photovoltage method for measuring minority carrier diffusion length in extrinsic semiconductors

2022 GB/T 41325-2022 Low density crystal originated pit polished monocrystalline silicon wafers for integrated circuit