IEC 61523-4:2015
Design and Verification of Low-Power Integrated Circuits
- Standard No.
- IEC 61523-4:2015
- Release Date
- 2015
- Published By
- International Electrotechnical Commission (IEC)
- Status
- 2023-10
- Replace By
- IEC 61523-4:2023
- Latest
- IEC 61523-4:2023/COR1:2024
- Replace
- IEC 91/1209/FDIS:2014
- Scope
- This standard establishes a format used to define the low-power design intent for electronic systems and electronic intellectual property (IP). The format provides the ability to specify the supply network@ switches@ isolation@ retention@ and other aspects relevant to power management of an electronic system. The standard defines the relationship between the low-power design specification and the logic design specification captured via other formats [e.g.@ standard hardware description languages (HDLs)]. Purpose The standard provides portability of low-power design specifications that can be used with a variety of commercial products throughout an electronic system design@ analysis@ verification@ and implementation flow.
IEC 61523-4:2015 Referenced Document
- IEC 61691-1-1:2011 Behavioural languages - Part 1-1: VHDL language reference manual
IEC 61523-4:2015 history
- 2024 IEC 61523-4:2023/COR1:2024 Corrigendum 1 - Delay and power calculation standards - Part 4: Design and Verification of Low-Power, Energy-Aware Electronic Systems
- 2023 IEC 61523-4:2023
- 2015 IEC 61523-4:2015 Design and Verification of Low-Power Integrated Circuits
