Institute of Electrical and Electronics Engineers (IEEE)
Latest
IEEE Std 1800.2-2020
Scope
The Universal Verification Methodology (UVM) that can improve interoperability, reduce the cost of using intellectual property (IP) for new projects or electronic design automation (EDA) tools, and make it easier to reuse verification components is provided. Overall, using this standard will lower verification costs and improve design quality throughout the industry. The primary audiences for this...
IEEE Std 1800.2-2020 history
2020IEEE Std 1800.2-2020 IEEE Standard for Universal Verification Methodology Language Reference Manual
2017IEEE Std 1800.2-2017 IEEE Standard for Universal Verification Methodology Language Reference Manual