JEDEC JESD82-29A-2010
Definition of the SSTE32882 Registering Clock Driver with Parity and Quad Chip Selects for DDR3/DDR3L/DDR3U RDIMM 1.5 V/1.35 V/1.25 V Applications

Standard No.

JEDEC JESD82-29A-2010

Release Date

2010

Published By

(U.S.) Joint Electron Device Engineering Council Soild State Technology Association