JEDEC JESD202-2006
Method for Characterizing the Electromigration Failure Time Distribution of Interconnects Under Constant-Current and Temperature Stress

Standard No.

JEDEC JESD202-2006

Release Date

2006

Published By

(U.S.) Joint Electron Device Engineering Council Soild State Technology Association

Scope

This is an accelerated stress test method for determining sample estimates and their confidence limits of the median-time-to-failure, sigma, and early percentile of a log-Normal distribution, which are used to characterize the electromigration failure-time distribution of equivalent metal lines subjected to a constant current-density and temperature stress. Failure is defined as some pre-selected fractional increase in the resistance of the line under test. Analysis procedures are provided to analyze complete and singly, rightcensored failure-time data. Sample calculations for complete and right-censored data are provided in Annex A. The analyses are not intended for the case when the failure distribution cannot be characterized by a single log-Normal distribution.