JEDEC JESD61A-2007
Isothermal Electromigration Test Procedure

Standard No.
JEDEC JESD61A-2007
Release Date
2007
Published By
(U.S.) Joint Electron Device Engineering Council Soild State Technology Association
Status
Scope
As the copper damascene technology has gained widespread use for ULSI interconnections, a renewed interest has developed in fast wafer level reliability (WLR) measurements to evaluate electromigration. The standard package level reliability (PLR) tests, used in the semiconductor industry, are very expensive when applied to copper metallizations, in comparison with aluminum-based structures, due to the considerable cost of the high temperature environmental chambers required (a typical stress temperature is 350 °C) and to the time (weeks, months) required to perform some characterizations.



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