JEDEC JESD8-2-1993
Standard for Operating Voltages and Interface Levels for Low Voltage Emitter-Coupled Logic (ECL) Integrated Circuits

Standard No.
JEDEC JESD8-2-1993
Release Date
1993
Published By
(U.S.) Joint Electron Device Engineering Council Soild State Technology Association
Scope
The intent of the Standard is to guide designs intended for Low Voltage ECL applications. The objective is to provide standard operating voltage and interface levels that can be used by designers and application engineers as they develop and introduce new products. The ECL Logic family covered by this Standard is to be designated 300K ECL. Note that the 300K ECL family is Voltage and Temperature Compensated, with ¡/O interface leveis compatible with the existing 100K ECL and 101K ECL families.



Copyright ©2024 All Rights Reserved