The following topics are dealt with: Expert assistance in digital circuit design; use of a theorem prover for transformational synthesis; an overview of high level synthesis technologies for digital ASICs; simulated annealing based synthesis of fast discrete cosine transform blocks; knowledge based expert systems in testing and design for testability; knowledge based test strategy planning; HIT: a hierarchical integrated test methodology; use of fault augmented functions for automatic test pattern generation; macro-test: a VLSI testable-design technique; an expert systems approach to analogue VLSI layout; guaranteeing optimality in a gridless router using AI techniques. Authors Gordon Russell and Gaynor Taylor