IEC 62142-2005 First edition 2005-06 IEEE Std 1364.1
IEC/IEEE International Standard - Verilog(R) Register Transfer Level Synthesis

Standard No.

IEC 62142-2005 First edition 2005-06 IEEE Std 1364.1

Release Date

2002

Published By

Institute of Electrical and Electronics Engineers (IEEE)

Scope

Replaces IEEE Std 1364.1-2002. To develop a standard syntax and semantics for Verilog RTL synthesis. This standard shall define the subset of IEEE 1364 (Verilog HDL) which is suitable for RTL synthesis and shall define the semantics of that subset for the synthesis domain. This standard shall be based on the current existing standard IEEE 1364.