In this report the essential requirements on ESD-related technology data will be described which need to be delivered to design customers by a foundry vendor. Design customers can be design houses@ IDMs following a foundry strategy or IP vendors. The purpose is to ensure seamless design integration and ESD EDA verification of IC level ESD concepts [1@ 2]. Partial information e.g. on HBM robustness of certain ESD structures or even IO cells@ is not sufficient to guarantee a successful IC level ESD concept. To adapt ESD structures to performance requirements in mixed signal design blocks and to use pre-designed IP blocks correctly@ certain knowledge of the ESD behavior of the technology and devices is needed for the ESD expert integrating the various concepts on IC product level. It is economically not feasible for foundries to cover all aspects of customer specific ESD solutions and the related parameters. Also these ESD concepts are typically not known to the foundry in an early phase of technology development@ when test structures for ESD are defined. Thus@ an adequate set of parameters and their extraction method needs to be aligned between foundry industry and IC design customers. This allows foundries to plan test structures and measurement procedures in the initial phase of the development of a technology. Foundry customers can use this basic set of parameters to make decisions regarding their own ESD design solutions. In total@ an alignment on a set of parameters and their extraction methodology is a win-win situation for foundries and foundry customers. The document will present a generic set of ESD parameters@ which is applicable to most types of foundry technologies ranging from CMOS@ embedded NVM technologies to high voltage BCD technologies. It will be focused on a functional description of test structures and test procedures with minimum information on implementation details to avoid conflict with the design rules and electrical parameters of the various technologies. This is to provide for the most general application of the recommendations. Consequently@ the user of the document will need to ??translate?? the described structures and test conditions for the technology under consideration with its specific design rules and device types. However@ it is expected that the explanation of the functional purpose of a test structure and test procedure should give enough guidance@ both to the ESD device expert of foundry and the ESD design expert of customer@ to provide the relevant information. No target levels will be defined for the same reason. Each technology will need its own range of acceptable parameter values@ which will be examined and defined by foundries and their customers. Once the target values have been fixed@ regular monitoring is requested to ensure the compliance of the defined parameters with the actual technology capability. Any major modification of the technology has to result in a reevaluation of the parameter set. Beside this@ delta checks should be performed in regular intervals to capture any drift effects. It is the responsibility of the foundry to define the time intervals to guarantee a stable set of ESD parameters. This document is intended to become a guideline for best practice which is consolidated between foundries and foundry customers. It has been drafted by an open working group regularly reporting to industry and collecting feedback for further improvement.